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Figure 7-3: SR Latch

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Figure 7-3: SR Latch
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This is a Set-Reset (S-R or RS) latch implemented using NAND gates. See Figure 7-3 in Digital Fundamentals by Floyd textbook.

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10 Circuits

Date Created

1 month ago

Last Modified

1 month ago

Tags

  • nand latch
  • set-reset latch
  • nand rs latch
  • s-r latch
  • nand s-r latch
  • rs latch
  • latch

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SR Latch

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